1. Field of the Invention
This invention relates generally to semiconductor devices and, more particularly, to the power supplies which are located on the substrate of the semiconductor devices and which, in turn, receive power from a distributed power source. These power supplies can be used, for example, to provide power to the storage elements of a memory array.
2. Description of the Related Art
Referring to FIG. 1, a power supply unit for providing power to a voltage terminal Vbb is shown. The power-up detect unit 11, coupled to a terminal of power supply unit Vdd, provides a signal to an input terminal of analog detector unit 12. The output terminal of analog detector 12 is coupled to an input terminal of amplifier 13 and can be coupled to a first input terminal of amplifier 14 (i.e., as indicated by the dashed line). A second input terminal of amplifier 14 has the standby control signal applied thereto. The output terminals of amplifier 13 and amplifier 14 are coupled to the Vbb power supply unit output terminal.
Referring to FIG. 2, a schematic diagram of the analog detector unit 12 of FIG. 1 is shown. A Vdd power supply output terminal is coupled to a source terminal of p-channel transistor 21 while gate terminal of transistor 21 is coupled to ground. A drain terminal of transistor 21 is coupled to an input terminal of amplifier 25, to a gate terminal of n-channel transistor 22, and to a drain terminal of transistor 22. A source terminal of transistor 22 is coupled to a drain terminal of n-channel transistor 23 and to a gate terminal of transistor 23. The source terminal of transistor 23 is coupled to the substrate.
The operation of the power supply unit can be understood with reference to FIG. 3. When the Vdd power supply output terminal has voltage applied thereto beginning at t0, the POWER-UP DETECTOR (PUD) signal remains at a zero level until Vdd reaches a predetermined level. At the predetermined Vdd voltage level, occurring at time t1, the POWER-UP DETECTOR signal jumps an incremental amount and thereafter rises as a function of the rise in the Vdd voltage, e.g., in an unregulated supply. At time t2, the Vdd voltage has reached a steady state value and becomes a constant voltage. Similarly, the POWER-UP DETECTOR signal reaches a steady state value at this time. Because Vdd voltage is applied to each of the components of the circuit in FIG. 1, the voltage Vbb at the output terminal begins to fall at some time after the application of Vdd voltage. The fall of the Vbb voltage can also be triggered by the POWER-UP DETECT signal. The voltages S1 or S1' from the analog detector unit can be applied prior to the application of the Vdd voltage or can be generated by the application of the Vdd voltage (shown by dotted lines on the curves labelled S1 and S1') and illustrate two alternative and undesirable situations. In the first situation, the trip-voltage 1 Vt (the voltage level determined by the analog detector 12) is above the desired Vbb voltage level (for a negative going Vbb voltage). In the second situation, the trip-voltage 2 Vt is below the desired Vbb voltage level (for a negative going Vbb voltage). When the trip-voltage of the analog detector has the value 1 Vt, i.e., above the desired voltage level, then when Vbb crosses the trip-level 1 Vt, the main driver amplifier 13 is disabled. (The standby amplifier 14 is shown coupled to the voltage S1 or S1 ' by a dotted line indicating that the operation of the standby amplifier can already be enabled or can be enabled by the S1 or S1' signal.) This activity is illustrated by S1 in FIG. 3. The standby amplifier 13, having less power than the main driver amplifier 14, results in a longer time to reach the desired level. The time at the lower power level is indicated by the length of time, d, shown in FIG. 3. In the second situation where the trip-level is lower than the desired Vbb level, the various voltage levels can stabilize in such a manner that the main driver amplifier is never cut off as illustrated by the S1' voltage level in FIG. 3. In the first alternative situation, the desired Vbb voltage level is not achieved in an acceptable amount of time. In the second alternative situation, the main driver amplifier is never disabled and, consequently, unnecessary power is consumed.
A need has therefore been felt for apparatus and an associated method which would provide for the power-up of a supply voltage whereby the desired level would be reached in an timely manner. Similarly, the apparatus and method would not result in configurations wherein the main driver voltage would be unable to achieve the desired voltage. Expressed in an alternative manner, a need has been felt for apparatus and an associated method in which the power-up of a supply voltage was not limited by the discrete increments of an analog detector.